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1 Markets I: The Ecosystem and Exchange-Traded Marketsالأسواق عبر الإنترنت 2 Markets II: Rates, FX and Creditالأسواق عبر الإنترنت 3 Markets III: Commodities, Energy and Cryptoالأسواق عبر الإنترنت 4 Quantitative Methodsالأساليب عبر الإنترنت 5 Derivatives and Volatilityالمشتقات عبر الإنترنت 6 Rates, Credit, XVA and Riskالفائدة والائتمان والمخاطر عبر الإنترنت 7 Research Craft: Predictors, Backtests, Measurement, Portfoliosالبحث عبر الإنترنت 8 Strategies I: Equities and Futuresالاستراتيجيات عبر الإنترنت 9 Strategies II: Volatility, Relative Value, Macro and the Bank Desksالاستراتيجيات عبر الإنترنت 10 Microstructure and Executionالتنفيذ عبر الإنترنت 11 Market Making and High-Frequency Tradingصناعة السوق عبر الإنترنت 12 Machine Learning for Marketsتعلم الآلة عبر الإنترنت 13 Low-Latency Softwareالتكنولوجيا عبر الإنترنت 14 Networks, Hardware and Trading Infrastructureالتكنولوجيا عبر الإنترنت 15 Research, Data and Risk Platformsالتكنولوجيا عبر الإنترنت 16 The Desk and the Firmالشركة عبر الإنترنت 17 The Industry: Firms, Roles and Careersالمسارات المهنية عبر الإنترنت 18 The Interview Bookالمسارات المهنية عبر الإنترنت
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Quantitative Finance · المسرد

ما معنى Performance regression gate؟

Definition 25.3 Low-Latency Software · الفصل 25 — Testing and Deploying Low-Latency Systems

A performance regression gate is a test that runs a benchmark on the current build and on a candidate, on the same machine, and refuses the candidate if a latency statistic is worse by more than a stated tolerance with a stated confidence.

The 99th percentile of each of 800 runs of the gate’s benchmark (18 000 timed events each), alternating between the current build and one with a planted regression, on a laptop (Intel Core Ultra 7 155H, WSL2), the machine otherwise idle. Data: bench_gate.py.
Figure 25.2. The 99th percentile of each of 800 runs of the gate’s benchmark (18 000 timed events each), alternating between the current build and one with a planted regression, on a laptop (Intel Core Ultra 7 155H, WSL2), the machine otherwise idle. Data: bench_gate.py.
The gate’s detection and false-alarm rates against the number of runs per side, from 100 gates drawn from the measured runs of  for each point; the dashed line is 90% power. Data: fig_gate.py (deterministic, from the measured pools).
Figure 25.3. The gate’s detection and false-alarm rates against the number of runs per side, from 100 gates drawn from the measured runs of Figure 25.2 for each point; the dashed line is 90% power. Data: fig_gate.py (deterministic, from the measured pools).
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